A semiconductor device includes internal circuits that perform various functions using an external power voltage. The internal circuits may include some circuits, for example, high voltage circuits which use a different voltage from the external power voltage as an internal power voltage. The internal power voltage, i.e., a high voltage, for driving the high voltage circuits may be generated from a high voltage generator which is one of the internal circuits. In this case, chip level internal interconnections may be provided in the semiconductor device in order to electrically connect an output terminal of the high voltage generator to a power terminal of the high voltage circuits.
As the semiconductor device becomes more highly integrated, the pitch of the chip level internal interconnections has been reduced. Thus, there may be a limitation in stably supplying the internal power voltage to the high voltage circuit using only the chip level internal interconnections.
In addition, the semiconductor device may include so-called “redistributed” metal interconnections. The redistributed metal interconnections are provided to electrically connect chip pads, which are electrically connected with the internal circuits, to bonding pads. Effectively, the redistributed metal interconnections spatially redistribute, or reconfigure, the chip pads' first distribution of pad placements into a second distribution, or redistribution, having different, and generally more desirable, pad placements. The bonding pads correspond to pads which are in direct contact with solder bumps or bonding wires for package. Thus, by the “redistribution” of distributed chip pads to corresponding “redistributed” bonding pads, the redistributed bonding pads can be disposed at desired positions regardless of the positions or placements of the chip pads in the original distribution.
A semiconductor chip having the redistributed metal interconnections is taught in U.S. Pat. No. 6,211,576 B1 to Shimizu, et al., entitled “Semiconductor Device.” According to Shimizu, et al., a power wiring section, a ground wiring section and a signal wiring section are provided at a same level, and the power wiring section or the ground wiring section is formed adjacent to both sides of at least a portion of the signal wiring section.